# Assignment 1 Solution

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## Description

• Number Representation (15 marks)

Complete the table below. You must show your work to get full credit for an answer.

 Decimal Binary Hexadecimal -243 give 16-bit signed representation 728 give 16-bit signed representation 1101.0111 (unsigned) 11011100 (unsigned) 7D.8 1B5
• Floating Point Number Representation (15 marks)

1. Represent -76.678595 as an IEEE single precision floating point number (binary and hexadecimal).

1. Represent 19.459931 as an IEEE single precision floating point number(binary and hexadecimal).

1. Add the signed binary fixed point versions of the above two floating numbers using binary arithmetic and report your answer, showing your working.

You must show your work to get full credit.

• Boolean Algebra (10 marks)

Assume that F is a Boolean function, as defined below, and all the other Boolean variables are inputs. Derive and give:

1

1. The truth table,

1. A sum of products expression for F that is minimized.

1. A product of sums expression that F is minimized. By “minimized” we mean an expression that cannot be further simplified while retaining its form (sum of products or product of sums).

1. F(A;B;C;D) = (A+B D) (C B A+C D)

1. F(W;X;Y;Z) = (W + X)(ZY + X)

• Circuit Design (60 marks)

4.1 Universal Gates (10 marks)

A NAND gate or a NOR gate is a universal logic gate, because it can be used to construct all other logic gates. What is the minimum number of two input NAND gates required to implement the following Boolean expression F (X; Y; Z; W) = (X + Y ) (Z + W ), where X; Y; Z and W are inputs? Explain your reasoning. One you have figured out the minimum number of required NAND gates, draw the circuit in Logisim using only NAND gates and test it. The TAs should be able to change the logical values of the inputs while obtaining the correct output.

4.2 Parity Counter (30 marks)

You are asked to design a 4-to-3 parity counter. Such a circuit has 4 input bits, A, B, C, D and 3 output bits F2, F1, F0. The value that the circuit outputs is the number of its input bits that are set to 1. For example if the input is 1010, then the circuit will output 010 (which is the binary representation of 2 as the unsigned 3-digit binary number F2F1F0). Similarly, if the input is 1111, then the output will be 100. Consider F2 as the highest order bit of the result and F0 as the lowest order bit.

1. Construct the truth table for this circuit.

1. Write down the Boolean expressions for each of the three outputs in sum of products form. Now, simplify each expression using the laws of Boolean algebra to derive minimized sum-of-products forms.

1. Design this circuit in Logisim and test it. The TAs should be able to change the logical values of the inputs while obtaining the correct output.

2

What is the minimum number of full-adders and half-adders that are needed to count the total number of ones in an unsigned 7-bit binary number A6A5A4A3A2A1A0? You are allowed to use only full-adders and half-adders in your solution. You must show your work to get full credit. Draw the corresponding circuit diagram in Logisim and test it. For this you are allowed to use the built in “adder” module in logism-evolution, i.e., you don’t have to first build an adder from simpler gates.

• ASSIGNMENT SUBMISSION INSTRUCTIONS

Everything should be handed in electronically on mycourses. Each student is to submit his or her own unique solution to these questions.

1. The circuit diagrams must be in LOGISIM while text can be in PDF, RTF or TXT file formats. Zip all the files if your submission has more than 1 file.

1. The Logisim circuits must run under logism-evolution, to be graded.